On May 16, 2006 Freescale announced the MSC8144, the first chip in its third generation of multi-core digital signal processors. The MSC8144 will feature four of StarCore’s latest SC3400 DSP cores operating at up to 1GHz. The rest of the chip, including memory systems and an I/O coprocessor, can operate at up to 400 MHz. The chip incorporates considerable on-chip memory, with 16 Kbyte instruction and 32 Kbyte data caches for each DSP, a 128 Kbyte L2 instruction cache shared by all DSPs, 512 Kbytes of scratchpad SRAM, and 10 Mbytes of embedded DRAM. With its substantial DSP horsepower and expanded memory, the device is mainly focused on multi-channel infrastructure applications such as wireless base stations, carrier-class voice-over-packet equipment, and media gateways.
The SC3400 core in the MSC8144 is considerably faster than the SC140 cores used in previous chips from the MSC81xx family. This is largely due to a substantial increase in the clock rate, enabled in part by deepening the pipeline to 12 stages from 5 in the SC140. In addition, Freescale has further increased the clock rate of the SC3400 cores in the MSC8144 by hand-crafting certain critical portions of the SC3400 physical implementation instead of relying exclusively on logic synthesis. According to Freescale, this has improved speed, area, and power by 20% or more. Another important factor is the fabrication process; the MSC8144 uses a high-speed 90 nm process. BDTI has benchmarked the SC3400 using the BDTI DSP Kernel Benchmarks™ and found the SC3400 running at 1 GHz to have roughly twice the signal-processing speed of the SC140 running at its maximum clock rate of 500 MHz. The SC3400 at 1 GHz achieves a similar signal processing speed compared to the 1 GHz Texas Instruments C64x+.
An I/O coprocessor, which is based on two RISC cores, helps keep the four DSPs supplied with data. The I/O coprocessor supports a range of I/O interfaces, including a packet interface with dual Ethernet ports, 2,048 channels of TDM serial I/O, and a 66 MHz PCI port. The presence of an I/O coprocessor underscores the focus of the MSC8144 on multi-channel infrastructure applications. By using coprocessors for I/O tasks, the DSP cores can be utilized to process a higher number of channels per DSP. For example, Freescale reports that the MSC8144 can handle 336 channels of voice-over-IP using the G.729AB codec.
Freescale claims that the MSC8144 is the highest performance fully programmable DSP, with performance equivalent to that of a single 4 GHz core. For applications that can make full use of the MSC8144 architecture, the MSC8144 may very well be the highest performance DSP from an established vendor. There are however numerous highly parallel DSP architectures available from smaller vendors, some of which will likely deliver higher performance. Whether or not the four SC3400 cores operating at 1 GHz offer performance similar to a 4 GHz single core will depend on the application. Communications infrastructure applications are particularly suited to multiprocessor architectures because they are usually channel-based, and each processor can typically handle a set of channels without much need for communication with other processors. For these applications the MSC8144 will likely deliver performance comparable to a single 4 GHz core. In other applications performance will hinge on efficient communication between processors. BDTI has not yet had the opportunity to evaluate this aspect of the MSC8144 design.
At the time of announcement, Freescale reported that MSC8144 first silicon was just coming out of the fab. General sampling is planned for the third quarter of 2006. Suggested retail pricing in 10,000 unit quantities starts at $180.
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